Data Sheet
ADP5041
Rev. 0 | Page 31 of 40
APPLICATIONS INFORMATION
BUCK EXTERNAL COMPONENT SELECTION
Trade-offs between performance parameters such as efficiency
and transient response are made by varying the choice of
external components in the applications circuit, as shown in
Figure 1.
Feedback Resistors
Referring to Figure 102, the total combined resistance for R1
and R2 is not to exceed 400 k?
Inductor
The high switching frequency of the ADP5041 buck allows for
the selection of small chip inductors. For best performance, use
inductor values between 0.7 糎 and 3.0 糎. Suggested inductors
are shown in Table 9.
The peak-to-peak inductor current ripple is calculated using
the following equation:
L
f
V
V
V
V
SW
IN
OUT
IN
OUT
RIPPLE
?/DIV>
?/DIV>
?/DIV>
=
)
(
where:
fSW is the switching frequency.
L is the inductor value.
The minimum dc current rating of the inductor must be greater
than the inductor peak current. The inductor peak current is
calculated using the following equation:
2
)
(
RIPPLE
MAX
LOAD
PEAK
I
I
+
=
Table 9. Suggested 1.0 糎 Inductors
Vendor
Model
Dimensions
(mm)
ISAT
(mA)
DCR
(m?
Murata
LQM2MPN1R0NG0B 2.0 ?1.6 ?0.9 1400
85
Murata
LQM18FN1R0M00B
3.2 ?2.5 ?1.5 2300
54
Tayo Yuden CBC322ST1R0MR
3.2 ?2.5 ?2.5 2000
71
Coilcraft
XFL4020-102ME
4.0 ?4.0 ?2.1 5400
11
Coilcraft
XPL2010-102ML
1.9 ?2.0 ?1.0 1800
89
Toko
MDT2520-CN
2.5 ?2.0 ?1.2 1350
85
Inductor conduction losses are caused by the flow of current
through the inductor, which has an associated internal dc
resistance (DCR). Larger sized inductors have smaller DCR,
which may decrease inductor conduction losses. Inductor core
losses are related to the magnetic permeability of the core material.
Because the buck is a high switching frequency dc-to-dc converter,
shielded ferrite core material is recommended for its low core
losses and low EMI.
Output Capacitor
Higher output capacitor values reduce the output voltage ripple
and improve load transient response. When choosing the
capacitor value, it is also important to account for the loss of
capacitance due to output voltage dc bias.
Ceramic capacitors are manufactured with a variety of dielec-
trics, each with a different behavior over temperature and
applied voltage. Capacitors must have a dielectric adequate
to ensure the minimum capacitance over the necessary
temperature range and dc bias conditions. X5R or X7R
dielectrics with a voltage rating of 6.3 V or 10 V are highly
recommended for best performance. Y5V and Z5U dielectrics
are not recommended for use with any dc-to-dc converter
because of their poor temperature and dc bias characteristics.
The worst-case capacitance accounting for capacitor variation
over temperature, component tolerance, and voltage is calcu-
lated using the following equation:
CEFF = COUT ?(1 TEMPCO) ?(1 TOL)
where:
CEFF is the effective capacitance at the operating voltage.
TEMPCO is the worst-case capacitor temperature coefficient.
TOL is the worst-case component tolerance.
In this example, the worst-case temperature coefficient (TEMPCO)
over 40癈 to +85癈 is assumed to be 15% for an X5R dielectric.
The tolerance of the capacitor (TOL) is assumed to be 10%, and
COUT is 9.24 糉 at 1.8 V, as shown in Figure 108.
Substituting these values in the equation yields
CEFF = 9.24 糉 ?(1 0.15) ?(1 0.1) = 7.07糉
To guarantee the performance of the buck, it is imperative
that the effects of dc bias, temperature, and tolerances on the
behavior of the capacitors be evaluated for each application.
0
2
4
6
8
10
12
0
1
2
3
4
5
6
DC BIAS VOLTAGE V
Figure 108. Typical Capacitor Performance
The peak-to-peak output voltage ripple for the selected output
capacitor and inductor values is calculated using the following
equation:
T
IN
OUT
SW
RIPPLE
RIPPLE
C
L
f
V
C
f
I
?/DIV>
?/DIV>
?/DIV>
?/DIV>
?/DIV>
=
2
2
H
8
?/DIV>
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